Hardware engineer interview questions: circuits, boards and debugging

Fifteen common hardware engineer interview questions

1. Analyse this RC circuit: what is its time constant and frequency response?
2. What are setup and hold times? What happens if they're violated?
3. What is metastability, and how do you mitigate it across clock domains?
4. Linear regulator versus switching regulator — trade-offs?
5. How do you choose decoupling capacitors and place them?
6. What causes ringing on a signal, and how do you fix it?
7. When does a trace need controlled impedance?
8. How do you reduce electromagnetic interference on a board?
9. What is ground bounce?
10. How do you choose a MOSFET for a switching application?
11. Explain pull-up and pull-down resistors.
12. How do you use an oscilloscope to debug a signal integrity issue?
13. A board draws too much current at power-up. What do you check?
14. What is design for manufacture and test?
15. Walk me through a board you designed.

Fundamentals interviewers probe

• RC time constant: τ = R × C; the capacitor reaches about 63% of its final voltage after one τ; a first-order RC low-pass filter's cutoff is 1 / (2πRC).
• Setup and hold: data must be stable for a minimum time before and after the clock edge; violations can cause metastability, where a flip-flop settles unpredictably.
• Clock domain crossing: synchronise single-bit signals with two-flop synchronisers; use handshakes or asynchronous FIFOs with Gray-coded pointers for multi-bit data.
• Pull resistors: define a logic level when nothing drives the line, as on open-drain buses such as I2C.

Power design

Decoupling capacitors supply fast transient current close to each IC's power pins; place small values closest to the pins with short paths to ground, and combine values to cover a range of frequencies. Inrush current at power-up — from bulk capacitance or a fault — is a common debugging scenario: check for shorts, measure rail sequencing and soft-start, and look at the current waveform.

Signal integrity and EMI

Ringing and overshoot come from impedance mismatches on fast edges; fix them with series termination, controlled-impedance traces and shorter stubs. A trace needs controlled impedance when its length is a meaningful fraction of the signal's rise-time wavelength — a rough rule is when propagation delay exceeds about a sixth of the rise time. Reduce EMI with continuous ground planes, short return paths, avoiding splits under high-speed signals, filtering at connectors and slowing edges where possible. Ground bounce happens when many outputs switch at once and the inductance of the ground path shifts the local ground.

Debugging and test

• Start with power: rails, ripple, sequencing and current draw.
• Then clocks and resets.
• Probe signals with a short ground lead to avoid measurement artefacts.
• Use a logic analyser for protocol-level problems and thermal imaging for hot spots.
• Design for test: test points, boundary scan, and programming headers from the start.

Practising

Reading answers is not the same as saying them. Pick ten of the questions above and answer them aloud against a timer; a free AI interview assistant like CoPilot Interview can ask hardware engineering questions in a mock interview and flag answers that ran long or lacked an example. Prepare a board you designed as a structured walkthrough: requirements, architecture, key component choices, a problem you debugged, and what you'd change in the next revision. Firmware-adjacent roles should also see embedded software questions.

Disclosure: CoPilot Interview is our product, so weigh what we say about it accordingly. Everything else on this page applies whichever tool you use, or none.

Frequently asked questions

What questions are asked in a hardware engineer interview?

Circuit analysis, digital logic and timing, metastability, power regulators, decoupling, signal integrity and impedance, EMI, component selection, test equipment, board debugging, design for manufacture and a project deep dive.

What is metastability?

An unstable state a flip-flop can enter when its input changes too close to the clock edge, resolving unpredictably. Synchronisers reduce the probability that it propagates.

Linear or switching regulator?

Linear regulators are simple and quiet but inefficient with large voltage drops. Switching regulators are efficient for larger currents but add noise and design complexity.

How do you debug a board that doesn't work?

Check power rails and current draw first, then clocks and resets, then probe signals with proper grounding, using a logic analyser and thermal imaging as needed.